/*
Encoder.Asm

Copyright ©1998, 1999 Larry Barello

Author: Larry Barello
        lbarello@accessone.com

You are allowed to use this file for personal use only.

You may use, embed, modify or distribute the contents
of this file in any way you see fit as long as you 
include this copyright notice in the resulting file.

Any commercial or industrial use including publishing
or distributing in any form requires the written 
authorization of the copyright holder(s).

No guarantees are made about fitness, functionality, 
correctness or performance of this file.  The file is 
supplied on a "AS IS" basis, with no responsibility 
assumed by the author(s) for bug fixes, support, or 
damages of any sort arising from the use of this file. 

Contact the author with problem reports or fixes, 
feature requests or additions and questions.  They 
are welcomed and will be incorporated as time and 
energy permits.
*/
#include        "registers.inc"
#include        "AvrX.inc"
;
; New Encoder 
;
; Interrupt driven off of INT0 and INT1
;
        NAME    ENCODER

;+
; Position/Velocity Encoder stuff
;
ENCODER		= PIND
ENCODER_INIT	= 0xCC	; Pull ups on Encoder inputs

Right_Enc_A	= PD2   ; INT0
Right_Enc_B	= PD6
Left_Enc_A	= PD3	; INT1 Incremental encoder inputs
Left_Enc_B	= PD7

;-
        PUBLIC  Init_Encoder INT0_Interrupt INT1_Interrupt

        RSEG    CODE
;+
; Init_Encoder
;
; Initialized both external interrupts to falling edge 
; trigger and enables their interrupt flag.
;-
Init_Encoder:
        in      R30, MCUCR
        sbr     R30, 1<<ISC11 + 1<<ISC01
        out     MCUCR, R30
        ldi     R30, 1<<INT1 + 1<<INT0
        out     GIMSK, R30
        in      R30, PORTD
        sbr     R30, ENCODER_INIT
        out     PORTD, R30
        ret
;+
; INT0_Interrupt
;
; Fields the A line for an encoder.  Increments/Decrements a
; register counter per the state of the B line.  Flips sense of 
; external interrupt in preperation for the next state transistion.
;
; Because we don't interrupt on the B line, this only does 
; 1/2 quadurature decoding.
;
; 30 cycles/interrupt
;-
INT1_Interrupt:
        BeginInterrupt

        push    R30
        in      R30, SREG
        push    R30
        in      R30, MCUCR
        sbrc    R30, ISC10      ; Was this an up or down event?
        rjmp    INT1_up

        sbic    ENCODER, Left_Enc_B
        inc     LeftEncoder
        sbis    ENCODER, Left_Enc_B
        dec     LeftEncoder

        sbr     R30, 1<<ISC10   ; Switch Trigger to rising edge
        out     MCUCR, R30

        rjmp    INT1_done
INT1_up:
        sbic    ENCODER, Left_Enc_B
        dec     LeftEncoder
        sbis    ENCODER, Left_Enc_B
        inc     LeftEncoder

        cbr     R30, 1<<ISC10   ; Switch Trigger to falling edge
        out     MCUCR, R30
INT1_done:
        pop     R30
        out     SREG, R30
        pop     R30

        EndInterrupt

INT0_Interrupt:
        BeginInterrupt
        
        push    R30
        in      R30, SREG
        push    R30
        in      R30, MCUCR
        sbrc    R30, ISC00      ; Was this an up or down event?
        rjmp    INT0_up

        sbic    ENCODER, Right_Enc_B
        inc     RightEncoder
        sbis    ENCODER, Right_Enc_B
        dec     RightEncoder

        sbr     R30, 1<<ISC00   ; Switch Trigger to rising edge
        out     MCUCR, R30

        rjmp    INT0_done
INT0_up:
        sbic    ENCODER, Right_Enc_B
        dec     RightEncoder
        sbis    ENCODER, Right_Enc_B
        inc     RightEncoder

        cbr     R30, 1<<ISC00   ; Switch Trigger to falling edge
        out     MCUCR, R30
INT0_done:
        pop     R30
        out     SREG, R30
        pop     R30
        
        EndInterrupt


        END