;***** Pin definitions

.equ	RxD	= PD2
.equ	TxD	= PD4
.equ	RxPORT	= PIND
.equ	TxPORT	= PORTD


.set	DDRD_INIT = DDRD_INIT | (1<<TxD)	; Rx is input (default)
.set	PORTD_INIT= PORTD_INIT | (1<<TxD)	; Set Tx 1, Stop bit.
;
; Note: Negative level interrupt (default reset mode) is what we use.
;
.set	GIMSK_INIT = (1<<INT0)			; enable external interrupts

	.cseg

;***************************************************************************
;
; putchar
;
; This subroutine transmits the byte stored in the "Txbyte" register
;
; NOTE: Disables interrupts to preserve timing.
;	Does not alter the contents of TxByte
;
putchar:
	cli
	ldi	bitcnt,9	;1+8
	clc			;Start bit
putchar0:
	brcs	putchar1	;If carry set
	cbi	TxPORT,TxD	;    send a '1'
	rjmp	putchar2	;else	
putchar1:
	sbi	TxPORT,TxD	;    send a '0'
	nop
putchar2:
	rcall 	UART_delay	;One bit delay
	rcall 	UART_delay

	ror	Txbyte		;Get next bit - Last bits will be 0 (stop)
	dec	bitcnt		;If not all bit sent
	brne	putchar0	;   send next

	sbi	TxPort, TxD	;else
	rcall	UART_Delay	;   Stop Bit
	rcall	UART_Delay
	reti			;   return, interrupts enabled.

;***************************************************************************
;
; getchar
;
; This subroutine receives one byte and returns it in the "Rxbyte" register
;
;
getchar:	
	sbrs	Flags, RxRdy	; Wait for start bit (simple blocking wait)
	rjmp	getchar		; 
	cbr	Flags, 1<<RxRdy
	ret

;*************************************************************************
;
; Extern_Interrupt
;
; We use the external interrupt to activate the usart input routine.
; communications to the main routine is via a flag (RxRdy).  Polling for the
; start bit would be timing dependent, hence the use of an interrupt.
;
; This works in conjunction with the monitor process.  It isn't called until
; a charactor is ready to be processed.  This allows other main loop processes
; to run.  
;
Extern_interrupt:
	ldi 	bitcnt,9	;8 data bit + 1 stop bit
	rcall	UART_delay	;0.5 bit delay		; Start bit
E1:
	rcall	UART_delay	;1 bit delay		; first bit.
	rcall	UART_delay

	clc			;clear carry
	sbic 	RxPORT,RxD	;if RX pin high
	sec			;   Set carry

	dec 	bitcnt		;If bit is stop bit
	breq 	e2		;   return
				;else
	ror 	Rxbyte		;   shift carry bit into Rxbyte
	rjmp 	E1		;   go get next

E2:
	sbr	Flags, (1<<RxRdy)

	reti

;***************************************************************************
;*
;* "UART_delay"
;*
;* This delay subroutine generates the required delay between the bits when
;* transmitting and receiving bytes. The total execution time is set by the
;* constant "b":
;*
;*	b = (Clock/(2*baud)-11)/3 
;*
;* 3·b + 11 cycles: 7 to get here and return, 4 more for body of code, above.
;  Actually, we need to adjust 8 cycles (average) in Putchar and Extern_interrupt
;  but since UART_Delay is called twice, we adjust only 4
;
.equ	baud	= 19200


UART_delay:	ldi	U_tmp, ((CPUCLK/(baud * 2)) - 11)/3
UART_delay1:	dec	U_tmp
		brne	UART_delay1

		ret
;
; getc
;
; Examines state of machine.  If charactor waiting, or interrupts are
; disabled, returns true (T = 1)
;
getc:
	set			; set T bit
	sbrc	Flags, RxRdy
	rjmp	getc_t		; Charactor waiting
	brid	getc_t		; Interrupts disabled
	in	u_tmp, GIMSK
	sbrs	u_tmp, INT0	; External interrupt disabled
	rjmp	getc_t
	clt			; if none of the above true, then return false
getc_t:
	ret